KAOHSIUNG (TVBS News) — Taiwan Semiconductor Manufacturing Company (TSMC, 台積電) marked a significant milestone in southern Taiwan by holding a low-key equipment installation ceremony at its first 2-nanometer wafer plant in Kaohsiung on Tuesday (Nov. 26).
The company plans to begin trial production in the first half of next year, symbolizing a new chapter in its regional expansion. The event remained an internal affair, reportedly led by TSMC's Executive Vice President and Co-Chief Operating Officer Y.P. Chyn (秦永沛), without public access.
According to the city government, Kaohsiung Mayor Chen Chi-mai (陳其邁) did not attend, as he was scheduled for a city council interpellation session. At an October investor conference, TSMC Chairman and CEO C.C. Wei (魏哲家) noted that interest in the 2-nanometer process exceeded expectations, prompting the company to prepare more capacity than for the 3-nanometer process.
TSMC aims to mass-produce the 2-nanometer chips next year, with facilities in Hsinchu's Baoshan (寶山) and Kaohsiung. The first 2-nanometer plant in Baoshan began equipment installation in April and will commence production next year. The Kaohsiung and Baoshan plants plan to reach mass production by 2026, significantly boosting TSMC's manufacturing footprint in southern Taiwan.
The 2-nanometer technology offers a 10% to 15% speed increase over the upgraded 3-nanometer N3E process at the same power level, a 25% to 30% reduction in power consumption at the same speed, and an over 15% improvement in chip density. Market analysts expect Apple and AMD to be among the first clients to receive the new process.
