power consumption of Spin-Orbit Torque Magnetic Random Access Memory 結果共1筆

ITRI and TSMC are partnering to develop a SOT-MRAM array chip with lower power consumption and faster operation than STT-MRAM. The new design has potential applications in in-memory computation and is expected to advance the field of high-speed semiconductors. The General Director of ITRI’s Electronic and Optoelectronic System Research Laboratories, Chang Shih-chieh, highlighted the chip’s low power consumption and quick 10-nanosecond operating time, which enable improved computational efficiency and expand the potential applications beyond traditional memory-oriented scenarios. The research results were presented at the IEDM, showcasing the technology’s potential for high-performance computing, artificial intelligence, and automotive chips. Additionally, ITRI’s focus on non-volatile memory technologies demonstrates their commitment to pushing the boundaries of the domestic semiconductor markets and exploring new areas of application.